ARTICLES & TUTORIALS ON RF RECEIVER DESIGN

The Design of a CMOS GPS Receiver

An overview of receiver design for GPS Applications. This presentation goes over CMOS LNA design, Active Filters, Mixers, Receiver Implementation and Experimental Results.

By Derek K. Shaeffer, from Stanford University

Design of a 2.4 GHz Fully Differential Zero-IF CMOS Receiver Employing a Novel Hybrid Balun for Wireless Sensor Network 

A differential zero – IF receiver is designed on a 0.18um CMOS process for 802.15.4 ZigBee Applications. It consists of a hybrid Balun, differential cascode LNA, passive mixers and active RC Filters. 

By Shinil Chang, Jubong Park,Kwang-Ho Won, and Hyunchol Shin

CMOS RF Receiver Design for Wireless LAN Applications

This paper goes over the design of a RF CMOS receiver operating at 2.4 GHz for spread-spectrum Wireless LAN applications. The device is fabricated using 0.6 um CMOS process and has a supply voltage of 3 V, with a gain of 34 dB while dissipating 80mW of power. Dynamic range and linearity requirements of A/D converters are also discussed.

By Behzad Razavi , from The Electrical Engineering Department , University of California, Los Angeles 

A 5.2 GHz CMOS Receiver with 62-dB Image Rejection

This paper describes a 5.2 GHz CMOS receiver based on a downconversion hetrodyne architecture with a local oscillator frequency of 2.6 GHz which applies offset cancellation to the base-band amplifiers. The receiver has a noise figure of 6.4 dB, an IP of 15 dBm , and a voltage conversion gain of 43 dB, while dissipating 29mW from a 2.5 V supply.

By Behzad Razavi, Member, IEEE

RF Design of a Wideband CMOS Integrated receiver for Phased Array Applications

This paper outlines receiver Front End Development including the design and simulation of an LNA using a wideband input-power-match for noise cancellation. The Receiver is designed to operate at frequencies between 500 MHz and 1700 Mhz. It consists ofa an LNA, band pass filter, quadrature mixer, anti-aliasing filter, digitiser and serialiser. It is fabricated on a 0.18um CMOS process.

Suzy A. Jackson from CSIRO Australia Telescope National Facility and Macquarie University, Sydney,Australia.